Automated Metabolic P System Placement in FPGA
نویسندگان
چکیده
منابع مشابه
Acceleration of FPGA placement
Placement (and routing) of circuits is very computationally intensive. This intensity has motivated several attempts at acceleration of this process for application-specific integrated circuits (ASIC) and Field-programmable gate arrays (FPGA). In this paper an overview of some of these attempts is given. Specifically, parallelization of the standard simulated annealing (SA) algorithm is examine...
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Increasing the performance of uniprocessor systems is becoming increasingly difficult. As a result, processor systems are moving towards chip multiprocessor designs. Because of this trend, parallel programming design is becoming increasingly important. This presents new issues for complex software optimized for uniprocessor performance. CAD tools for placing and routing of FPGA designs are an e...
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Field-Programmable Gate Arrays (FPGAs) are flexible and reusable circuits that can be easily reconfigured by the designer. One of the steps involved in the logic design with FPGA circuits is placement. In this step, the logic functions are assigned to specific cells of the circuit. In this paper we present a placement algorithm for FPGA circuits. In traditional min-cut based placement algorithm...
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Field-Programmable Gate Arrays (FPGAs) are flexible circuits that can be (re)configured by the designer. The efficient use of these circuits requires complex CAD tools. One of the steps of the design process for FPGAs is represented by placement. In this paper we present a genetic algorithm for the FPGA placement problem, in particular for the Atmel FPGA circuits. Because of the limited routing...
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FPGA placement and routing are still challenging problems. Given the increased diversity of logic and routing resources on FPGA chips, it seems appropriate to tackle the placement problem as a mapping between the nodes and edges in a circuit graph to compatible resources in the architecture graph. We explore utilizing graph isomorphism algorithms to perform FPGA placement. We use a hierarchical...
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ژورنال
عنوان ژورنال: Electrical, Control and Communication Engineering
سال: 2016
ISSN: 2255-9159
DOI: 10.1515/ecce-2016-0001